
Workshop
A half-day or full-day session for leadership and the people who do the work. What today's AI tools and agents can actually do, shown live on your kind of work, and a short list of workflows worth trying first.
PONCHI AI
Ponchi AI is my AI consulting practice. I help CEOs, CTOs, and engineering leaders find the workflows where AI earns its place, build the agent systems that run them, and train the team that keeps them running — the same way I run AI across chip design, firmware, and test at the company I co-founded.
WHAT I OFFER
Every engagement starts from one workflow your team already runs by hand — the report that takes a day to assemble, the review that waits on one person, the handoff that loses context every time. More output from the same team, or the same output with less repetitive work, is the goal. Pick the entry point that fits where you are.

A half-day or full-day session for leadership and the people who do the work. What today's AI tools and agents can actually do, shown live on your kind of work, and a short list of workflows worth trying first.

I sit with one team, map how a real piece of work moves from input to output, and mark where an agent can take a step, where a person must keep the decision, and what evidence would show it helped.

One bounded workflow, built end to end: the agent, its tools, the knowledge it reads, and the checks around it — running on your machines, against your own data, with your team reviewing every result.

The pilot becomes a working system your team owns. Standing instructions, shared memory, review loops, and the training that lets your people extend it without me.
WHAT THE AGENTS ALREADY DO
This is the system I run at the company I co-founded, across board design, analog and digital circuits, mechanical parts, and firmware. Every result below is something an agent produced and an engineer can open, check, and build on.

The EE agent draws the schematic, places the parts, and routes the board, checking its choices against a reference library of 174 real board designs. Its boards include an eight-channel piezo transmit-and-receive board, four-layer development kits, sensor breakouts, regulator and op-amp test boards, a reworked haptic driver stage, and a multi-channel 3D-sonar board.
Handed a haptic driver's datasheet, the agent reads the layout guidance, ties each recommendation to the exact pin and net on the board, widens the input trunk from 0.4 to 0.5 mm and the switch node from 0.4 to 0.8 mm, and adds 13 mm² of input copper. The revised board passes the design-rule check with zero errors and zero unconnected nets.


The analog agent turns a spec into a schematic, a test bench, and measured simulation results. It sizes amplifier topologies from a simple five-transistor stage at 48 dB of gain to a folded cascode at 85 dB, and its phase margin matches Cadence Spectre to within a thousandth of a degree.
The digital flow carries RTL through verification, synthesis, and place-and-route. A 36,000-cell design comes out placed and routed with zero routing violations, zero antenna nets, and positive setup and hold slack.


The mechanical agent models parts in CAD from a short description — a tendon-driven robot finger, sensor evaluation cradles, test jigs, and development kit enclosures — with exploded views, sections, and dimensioned drawings.
Production firmware runs on a host with emulated peripherals and a real I²C link, and every recorded sensor capture is checked automatically against a Python reference model, channel by channel.

HOW I BUILD IT
Most AI rollouts stall at the chat window: someone pastes data in, copies an answer out, and nobody can tell which answers to trust. The systems I build work differently. The agent works on the computer where the data lives, reads the files and tools it is allowed to touch, and hands back evidence a person can check.

You supply the goal, the sources, the authority, and what counts as done. The agent works inside that boundary and returns its result with the evidence attached. You delegate the task and keep the decision.

Agents draw on the company's own documents through retrieval rather than a model's memory, so every answer can point back to the source it came from — and several agents can work from the same ground truth.

The agent that does the work never signs it off. An independent reviewer, starting fresh, tests the result against the acceptance criteria, and the loop repeats until the findings stop.

Low-risk, reversible work runs with automatic checks. Work that is complex, costly to get wrong, or hard to undo gets broken down, independently reviewed, and released by a person.

HOW AN ENGAGEMENT RUNS
Small, measurable steps. Each one ends with something you can see working and a clear decision about the next one.
Pick the workflow
One time-consuming piece of work, chosen with the people who do it, with a definition of what better looks like.
01
Define acceptance
What the agent may touch, what it must produce, and the check that tells a good result from a plausible one.
02
Build and run the pilot
The agent, its tools, and its knowledge base, running on your real work with a reviewer in the loop.
03
Review the evidence together
What changed, what the reviewer caught, and whether the workflow is ready to scale.
04
Hand over and train
Standing instructions, memory, and review loops in your hands, with the training to extend them.
05
PONCHI AI STUDIO
The same agent systems, pointed at something lighter. Draw-to-Play takes a child's drawing and carries it into a toy-scale 3D character and a short animation, keeping the shapes, colours, and little surprises that made the drawing theirs.
For families, schools, and brands that want a child's own character to come off the page.

ABOUT

I'm Hao-Yen Tang, co-founder and CTO of UltraSense Systems, where I run chip, firmware, algorithm, and system engineering. I work on the same problem from both ends: the physics of a piezoelectric transducer, and the mixed-signal circuit that has to read it for microamps in a car door at minus forty degrees.
Before UltraSense I was a staff IC designer at TDK-InvenSense, where I was chip lead across several generations of the UltraPrint ultrasonic fingerprint sensor family. I did my PhD at UC Berkeley in Bernhard Boser's group, where the fingerprint sensor-on-a-chip I built became the prototype for that product line and won the 2016 ISSCC best paper award.
Over the past year I have put AI agents to work across my company's engineering — chip design, firmware, test, documentation — and learned what it takes for a team to trust what they produce. Ponchi AI, my consulting practice, brings that to other companies: I help leaders pick the workflows worth automating, build the agent systems that run them, and train the people who keep them running.
3,223
citations
29
h-index
36
granted US patents
Citation figures from Google Scholar, as of 2026-10-08.
Recognition
ISSCC BEST PAPER
Lewis Winner Award for Outstanding Paper
IEEE International Solid-State Circuits Conference, 2016 · for “3D Ultrasonic Fingerprint Sensor-on-a-Chip”
The chip in that paper became the prototype for a commercial ultrasonic fingerprint sensor product line.
3 papers at ISSCC
IEEE International Solid-State Circuits Conference, the venue where new chip designs are first presented
2014, 2015, 2016
Predoctoral Achievement Award
IEEE Solid-State Circuits Society
2015
Outstanding Student Paper Award
IEEE International Conference on Micro Electro Mechanical Systems
2017
SILICON
This is the part that earns the right to claim anything above it. Each card says what the chip sensed, what I owned on it, and where you can check.

Piezoelectric micromachined ultrasonic transducers built monolithically on CMOS: the sensor, its analog front end, and an MCU on one die. The imaging chain reads a fingerprint through glass and metal by transmit beamforming and pulse-echo timing.
Chip lead, multiple generations · mixed-signal front end, high-voltage pulser, system bring-up

An ultrasound touch and force controller that turns an ordinary surface into a button. Sensor, analog front end, MCU, and the sensor-fusion algorithm all live on one chip, so a button can be placed behind metal with no hole and no moving part.
Chip lead · architecture, mixed-signal front end, high-voltage pulser, on-chip sensing algorithm

A multi-modal human-machine-interface SoC: capacitive touch, ultrasound touch and slider, and piezoelectric force sensing, fused on-chip. One part replaces the controller, the discrete force front ends, and the glue between them.
Chip lead · architecture, mixed-signal front end, high-voltage drive, sensor fusion

A controller that keeps a camera lens clear by driving it ultrasonically. One chip carries the power conversion from the vehicle battery, the piezo driver, an on-chip Hall-effect current sensor that tracks the transducer's resonance, and the digital control.
Chip lead · architecture, piezo driver, on-chip current sensing

A time-of-flight rangefinder on a chip, small enough and low-power enough to sit in a consumer device. Precision frequency demodulation and low-jitter time measurement are what make a centimetre-scale echo readable at microwatt power.
Analog designer, prototype and first production generation · high-voltage pulser, PLL and frequency demodulation, mixer and filter design

The thesis chip. A PMUT array bonded to CMOS that images a fingerprint in three dimensions, including the ridge structure below the skin surface. It became the prototype for a commercial fingerprint sensor product line.
Chip lead and inventor · array and circuit co-design, high-voltage pulser, beamforming

A handheld, battery-powered ultrasound imager demonstrated at ISSCC. The interesting part is the drive side: getting enough voltage into a discrete piezo element from a battery, efficiently enough that the whole instrument runs at milliwatts.
Chip lead · high-voltage drive, integrated charge pump

A millimetre-scale implant that records neural activity and is powered and read out by ultrasound through tissue, with no battery and no wire. I built the ASIC the prototype used; the work went on to seed iota Biosciences.
ASIC provider · ASIC design, ultrasound wireless power transfer

A DC-DC converter that starts up from 50 mV with no battery and no external kick, turning the few tens of millivolts a thermoelectric generator produces into a usable supply rail. My first silicon, and still my second most-cited paper.
Chip lead · converter architecture, startup circuit

A large-area ultrasonic fingerprint sensor built on a thin-film transistor backplane with a piezoelectric polymer film, driven by a companion ASIC.
Analog designer · high-voltage drive, transmit beamforming






CONTACT
Email is the reliable channel. I read LinkedIn messages, eventually.